1. Field
Embodiments of the invention relate to the field of computer systems, and more specifically, to the field of device configuration for computer systems.
2. Background
Devices and subsystems of a computer system may have configuration registers that may be accessed or programmed prior to or during the operation of the computer system. Conventional computer systems typically implements configuration registers that have limited space. For example, conventional Peripheral Component Interconnect (PCI) architecture limits a configuration register space available on a given device to, for example, 256 bytes. PCI Express Base architecture, as defined in a PCI Express Base Specification Revision 1.0 dated Jul. 22, 2002 by the PCI-SIG (Peripheral Component Interconnect—Special Interest Group), extended the available configuration register space of a given device to 4 kilobytes. Even with an increased configuration space of up to 4 kilobytes, Advanced Switching (AS) architecture requires more scalability especially when dealing with multi-ported switch devices given Advanced Switching's uni-function device configuration model. As a result, the configuration register space limitation burdens PCI and PCI Express Base architecture.
Additionally in PCI and PCI Express Base architecture there is, in many cases, potentially a necessary split between configuration mechanism that must be used to work around the configuration space limitations mentioned above. For example PCI and PCI Express Base components, if needed, must request additional internal configuration register, or table space by requesting a memory, or I/O (input/output) mapped space. As a result, to fully configure a PCI or PCI Express Base component of this type, some of the component set up may require using configuration transactions, while other elements may require set up using either memory or I/O transactions.